3. XF86_SVGA server

The XF86_SVGA ViRGE driver supports all current flavors of the S3 ViRGE chipset including Trio3D and the Savage family. It uses the XAA acceleration architecture for acceleration, and allows color depths of 8, 15, 16, 24 and 32 bpp. It has been tested on several 2MB and 4MB ViRGE cards, a 4MB ViRGE/DX card, a ViRGE/VX card and a 4MB Trio3D card. Resolutions of up to 1600x1200 have been achieved. This is an early release of this driver, and not everything may work as expected. Please note that Trio3D support is an initial release and not very well tested. Please report any problems to XFree86@Xfree86.org using the appropriate bug report sheet.

3.1. Features

• Supports PCI hardware, ViRGE, ViRGE/DX, ViRGE/GX, ViRGE/GX2, ViRGE/MX, ViRGE/VX, Trio3D and the Savage family.
• Supports 8bpp, 15/16bpp, 24bpp and 32bpp.
• VT switching seems to work well, no corruption reported at all color depths.
• Acceleration is pretty complete: Screen-to-screen copy, solid rectangle fills, CPU-to-screen color expansion, 8x8 pattern mono and color fills. Currently, the color expansion appears to be substantially faster than the accel server due to the optimized XAA routines.
• Acceleration at 32bpp is limited: only ScreenToScreen bitblit and solid rectangles are supported. The ViRGE itself has no support for 32bpp acceleration, so the graphics engine is used in 16bpp mode.
• All modes include support for a hardware cursor.

3.2. Known limitations in the Savage family support (s3_savage driver)

The Savage family driver for the Savage3D and the Savage4 was donated to XFree86 by S3 very closely before the release of XFree86-3.3.5. The driver violates a few design principles and goals, but since there is massive demand for it, we decided to include it in XFree86-3.3.5. For 3.3.6 some rewrites have been done, there is fallback code for non-BIOS modes.

3.3. Known limitations of the s3_virge driver

• No support for external RAMDACs on the ViRGE/VX.
• No support for VLB cards.
• No support for doublescan modes.
• The driver only works with linear addressing.
• Lines and polygons are not accelerated yet (but XAA still provides some acceleration in this respect).
• Burst Command Interface (BCI) support and 32bpp support not implemented for the Trio3D.
• Trio3D support only works for some modelines. Many of the standard modelines do not work (often slightly modifying the dot clock works, though). The following two modelines seem to work reliably at 8bpp and 24bpp:

  Modeline "1024x768"  75  1024 1048 1184 1328  768  771  777  806 -hsync -vsync
  Modeline "1280x1024" 135 1280 1312 1416 1664  1024 1027 1030 1064
  

  The following two modelines seem to work reliably at 16bpp:

  Modeline "640x480"  45.80 640 672 768 864 480 488 494 530 -hsync -vsync 
  Modeline "800x600"  36      800  824  896 1024    600  601  603  625
  

3.4. Configuration

The ViRGE SVGA driver supports a large number of XF86Config options, which can be used to tune PCI behavior and improve performance.

Memory options:

• "slow_edodram" will switch the ViRGE to 2-cycle edo mode. Try this if you encounter pixel corruption on the ViRGE. Using this option will cause a large decrease in performance.
• "early_ras_precharge" and "late_ras_precharge" will modify the memory timings, and may fix pixel corruption on some cards. The default behavior is set by the BIOS, and is normally "late_ras_precharge".
• "set_mclk value" sets the video memory clock rate to 'value' (in MHz). The performance of the card is directly proportional to the memory clocking, so this may provide a performance increase. The BIOS setting for your card is printed at server start-up. Often, "low-cost" cards use the S3 default of 50MHz. This can often be exceeded with faster memory, some cards may function reliably at 60 or 65 MHz (even higher on some recent /DX and /GX cards). Note that S3 only officially supports an MCLK of 50MHz and XFree86 does not encourage exceeding those specs. *** Note: This option should not be preceded by the "Option" keyword!

Acceleration and graphic engine:

• "noaccel" turns off all acceleration
• "fifo_aggressive", "fifo_moderate" and "fifo_conservative" alter the settings for the threshold at which the pixel FIFO takes over the internal memory bus to refill itself. The smaller this threshold, the better the acceleration performance of the card. You may try the fastest setting ("aggressive") and move down if you encounter pixel corruption. The optimal setting will probably depend on dot-clock and on color depth. Note that specifying any of these options will also alter other memory settings which should increase performance, so you should at least use "fifo_conservative" (this uses the chip defaults).

PCI options:

• "pci_burst_on" will enable PCI burst mode. This should work on all but a few "broken" PCI chipsets, and will increase performance.
• "pci_retry" will allow the driver to rely on PCI Retry to program the ViRGE registers. "pci_burst_on" must be enabled for this to work. This will increase performance, especially for small fills/blits, because the driver does not have to poll the ViRGE before sending it commands to make sure it is ready. It should work on most recent PCI chipsets. A possible side-effect is that it may interfere with DMA operations on the PCI bus (e.g. sound cards, floppy drive).

Cursor:

• "hw_cursor" turns on the hardware cursor.

Color depth options and limitations:

• Pixel multiplexing is used above 80MHz for 8bpp on the ViRGE.
• 15bpp is supported, use "-bpp 15" as an option to the server.
• 24bpp is supported using the STREAMS engine.
• 32bpp uses STREAMS as well; however, because the ViRGE does not really support 32 bpp "natively", acceleration is quite limited.
• Both 24bpp and 32bpp do not support interlace modes.
• 32bpp is limited to a width of < 1024 pixels. (1024x768 is not possible, even if you have the memory.) This is a hardware limit of ViRGE chips.

3.5. Hints for LCD configuration (S3 ViRGE/MX)

If LCD is active the CRT will always output 1024x768 (or whatever is the _physical_ LCD size) and smaller modes are zoomed to fit on the LCD unless you specify Option "lcd_center" in the device section.

The pixel clock for this physical size (e.g. 1024x768) mode...

• ...can explicitly set in the config file (device section) with e.g. `Set_LCDClk 70' (resulting 70 MHz pixel clock being used for all modes when LCD is on)
• ...is taken from the _first_ mode in the modes line iff this mode's display size is the same as the physical LCD size
• ...the default LCD pixel clock of BIOS initialisation setup is used. This value is output at server startup in the line `LCD size ...' unless you're specifying a value using `Set_LCDClk ...'

If LCD is _not_ active, the normal mode lines and pixel clocks are used for the VGA output.

Whenever you switch output sources with Fn-F5 or similar, the Xserver won't get informed and pixel clock and other settings are wrong. Because of this you have to switch modes _after_ switch output sources! Then the server will check which outputs are active and select the correct clocks etc. So the recommended key sequence to switch output is

Fn-F5 Ctrl-Alt-Plus Ctrl-Alt-Minus

and everything should be ok..

on the Toshiba keypad you can first hold down Ctrl-Alt, then press `Fn' additionally before pressing Plus/Minus too to avoid to explicitly enable/disable the numeric keypad for mode switching.